This invention relates to modeling of operation of complex large scale integration (LSI) or very large scale integration (VSLI) devices for use in development and testing of complex circuitry and systems. More specifically, the invention relates to logic simulation and testing of complex digital circuitry and systems including those capable of executing instructions under program control in which performance characteristics of LSI or VLSI devices must also be accurately simulated. In particular, this invention is related to solutions to problems related to development of logic-simulation models built around hardware library elements, as disclosed in the parent application. It is believed that to date no one other than the present inventor and his co-workers is active in this field.
A logic-simulation model of a device is a diagnostic tool which accurately mimics logical and timing behavior of a device in normal operation. The purpose of such a model is to verify both logic and timing of an operational digital system containing the device. In a logic-simulation model, internal operation and internal structure need not be similar to that of the actual device being simulated. The only prerequisite is that the operation as externally observed be similar to the actual device being modeled.
Conventional logic-simulation models have been implemented with software. The present invention in contrast is a development around logic simulation models based on library elements which are the actual hardware devices and which interact with other library elements through a combination of hardware and software.
Software logic-simulation models have been of two types, namely, structural models and behavioral models. A structural model mimics actual internal logical structure of a device from which observable functional behavior follows. A behavioral model merely mimics external logical and timing behavior.
Software models of complex devices have numerous disadvantages. First, they are relatively costly and time consuming to develop. Also, to design an accurate model, specifications of the device must be gathered and thoroughly understood. This has been a serious limitation because manufacturers of devices are generally reluctant to disclose such details. Moreover, the specifications required for modeling a device are typically much more detailed than those relevant to a typical user of the device.
Furthermore, software simulation models are characteristically slow because of the amount of computation required to simulate device functions. Typically, the amount of computation required to simulate external components is negligible compared with the amount of computation required to simulate the complex device itself. In fact, software logicsimulation models are frequently too slow to be of practical utility.
Heretofore, there have been few tools available to simulate operation of a complex circuit. Moreover, it has been discovered by this inventor that it is difficult to simulate circuit operation of dynamic circuit devices in circuit combination with static circuit devices when employing physical specimens as reference elements. Dynamic circuit devices are constrained to operate at a clock rate within a narrow range of variation. In the present invention, the simulator can make use of physical specimens of dynamic or static devices which can be reset to an initial state or otherwise known state through use of a reset signal or reset command sequence.
Static circuit devices may not synchronize all inputs at clock edges to that any change at any time of the values of the input signals has a potential effect on the outputs of the device. Consequently, the full history of the input behavior of a static circuit device is usually so long that it is impractical to store it in a limited-sized memory and to present it to the reference element simulation model in a reasonable amount of time.